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  1. /**
  2. *
  3. * \file
  4. *
  5. * \brief This module contains WINC3400 bus APIs implementation.
  6. *
  7. * Copyright (c) 2017-2018 Microchip Technology Inc. and its subsidiaries.
  8. *
  9. * \asf_license_start
  10. *
  11. * \page License
  12. *
  13. * Subject to your compliance with these terms, you may use Microchip
  14. * software and any derivatives exclusively with Microchip products.
  15. * It is your responsibility to comply with third party license terms applicable
  16. * to your use of third party software (including open source software) that
  17. * may accompany Microchip software.
  18. *
  19. * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
  20. * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
  21. * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
  22. * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
  23. * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
  24. * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
  25. * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
  26. * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
  27. * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
  28. * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
  29. * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
  30. *
  31. * \asf_license_stop
  32. *
  33. */
  34. #ifndef CORTUS_APP
  35. #include "nmbus.h"
  36. #include "nmi2c.h"
  37. #include "nmspi.h"
  38. #include "nmuart.h"
  39. #define MAX_TRX_CFG_SZ 8
  40. /**
  41. * @fn nm_bus_iface_init
  42. * @brief Initialize bus interface
  43. * @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
  44. * @author M. Abdelmawla
  45. * @date 11 July 2012
  46. * @version 1.0
  47. */
  48. sint8 nm_bus_iface_init(uint8 *pvInitVal, uint32 req_serial_number)
  49. {
  50. sint8 ret = M2M_SUCCESS;
  51. ret = nm_bus_init(pvInitVal, req_serial_number);
  52. return ret;
  53. }
  54. /**
  55. * @fn nm_bus_iface_deinit
  56. * @brief Deinitialize bus interface
  57. * @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
  58. * @author Samer Sarhan
  59. * @date 07 April 2014
  60. * @version 1.0
  61. */
  62. sint8 nm_bus_iface_deinit(void)
  63. {
  64. sint8 ret = M2M_SUCCESS;
  65. ret = nm_bus_deinit();
  66. return ret;
  67. }
  68. /**
  69. * @fn nm_bus_iface_reconfigure
  70. * @brief reconfigure bus interface
  71. * @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
  72. * @author Viswanathan Murugesan
  73. * @date 22 Oct 2014
  74. * @version 1.0
  75. */
  76. sint8 nm_bus_iface_reconfigure(void *ptr)
  77. {
  78. sint8 ret = M2M_SUCCESS;
  79. #ifdef CONF_WINC_USE_UART
  80. if(ptr)
  81. ret = nm_uart_reconfigure(ptr);
  82. else
  83. ret = M2M_ERR_BUS_FAIL;
  84. #endif
  85. return ret;
  86. }
  87. /*
  88. * @fn nm_read_reg
  89. * @brief Read register
  90. * @param [in] u32Addr
  91. * Register address
  92. * @return Register value
  93. * @author M. Abdelmawla
  94. * @date 11 July 2012
  95. * @version 1.0
  96. */
  97. uint32 nm_read_reg(uint32 u32Addr)
  98. {
  99. #ifdef CONF_WINC_USE_UART
  100. return nm_uart_read_reg(u32Addr);
  101. #elif defined (CONF_WINC_USE_SPI)
  102. return nm_spi_read_reg(u32Addr);
  103. #elif defined (CONF_WINC_USE_I2C)
  104. return nm_i2c_read_reg(u32Addr);
  105. #else
  106. #error "Plesae define bus usage"
  107. #endif
  108. }
  109. /*
  110. * @fn nm_read_reg_with_ret
  111. * @brief Read register with error code return
  112. * @param [in] u32Addr
  113. * Register address
  114. * @param [out] pu32RetVal
  115. * Pointer to u32 variable used to return the read value
  116. * @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
  117. * @author M. Abdelmawla
  118. * @date 11 July 2012
  119. * @version 1.0
  120. */
  121. sint8 nm_read_reg_with_ret(uint32 u32Addr, uint32* pu32RetVal)
  122. {
  123. #ifdef CONF_WINC_USE_UART
  124. return nm_uart_read_reg_with_ret(u32Addr,pu32RetVal);
  125. #elif defined (CONF_WINC_USE_SPI)
  126. return nm_spi_read_reg_with_ret(u32Addr,pu32RetVal);
  127. #elif defined (CONF_WINC_USE_I2C)
  128. return nm_i2c_read_reg_with_ret(u32Addr,pu32RetVal);
  129. #else
  130. #error "Plesae define bus usage"
  131. #endif
  132. }
  133. /*
  134. * @fn nm_write_reg
  135. * @brief write register
  136. * @param [in] u32Addr
  137. * Register address
  138. * @param [in] u32Val
  139. * Value to be written to the register
  140. * @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
  141. * @author M. Abdelmawla
  142. * @date 11 July 2012
  143. * @version 1.0
  144. */
  145. sint8 nm_write_reg(uint32 u32Addr, uint32 u32Val)
  146. {
  147. #ifdef CONF_WINC_USE_UART
  148. return nm_uart_write_reg(u32Addr,u32Val);
  149. #elif defined (CONF_WINC_USE_SPI)
  150. return nm_spi_write_reg(u32Addr,u32Val);
  151. #elif defined (CONF_WINC_USE_I2C)
  152. return nm_i2c_write_reg(u32Addr,u32Val);
  153. #else
  154. #error "Plesae define bus usage"
  155. #endif
  156. }
  157. static inline sint8 p_nm_read_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
  158. {
  159. #ifdef CONF_WINC_USE_UART
  160. return nm_uart_read_block(u32Addr,puBuf,u16Sz);
  161. #elif defined (CONF_WINC_USE_SPI)
  162. return nm_spi_read_block(u32Addr,puBuf,u16Sz);
  163. #elif defined (CONF_WINC_USE_I2C)
  164. return nm_i2c_read_block(u32Addr,puBuf,u16Sz);
  165. #else
  166. #error "Plesae define bus usage"
  167. #endif
  168. }
  169. /*
  170. * @fn nm_read_block
  171. * @brief Read block of data
  172. * @param [in] u32Addr
  173. * Start address
  174. * @param [out] puBuf
  175. * Pointer to a buffer used to return the read data
  176. * @param [in] u32Sz
  177. * Number of bytes to read. The buffer size must be >= u32Sz
  178. * @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
  179. * @author M. Abdelmawla
  180. * @date 11 July 2012
  181. * @version 1.0
  182. */
  183. sint8 nm_read_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
  184. {
  185. uint16 u16MaxTrxSz = egstrNmBusCapabilities.u16MaxTrxSz - MAX_TRX_CFG_SZ;
  186. uint32 off = 0;
  187. sint8 s8Ret = M2M_SUCCESS;
  188. for(;;)
  189. {
  190. if(u32Sz <= u16MaxTrxSz)
  191. {
  192. s8Ret += p_nm_read_block(u32Addr, &puBuf[off], (uint16)u32Sz);
  193. break;
  194. }
  195. else
  196. {
  197. s8Ret += p_nm_read_block(u32Addr, &puBuf[off], u16MaxTrxSz);
  198. if(M2M_SUCCESS != s8Ret) break;
  199. u32Sz -= u16MaxTrxSz;
  200. off += u16MaxTrxSz;
  201. u32Addr += u16MaxTrxSz;
  202. }
  203. }
  204. return s8Ret;
  205. }
  206. static inline sint8 p_nm_write_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
  207. {
  208. #ifdef CONF_WINC_USE_UART
  209. return nm_uart_write_block(u32Addr,puBuf,u16Sz);
  210. #elif defined (CONF_WINC_USE_SPI)
  211. return nm_spi_write_block(u32Addr,puBuf,u16Sz);
  212. #elif defined (CONF_WINC_USE_I2C)
  213. return nm_i2c_write_block(u32Addr,puBuf,u16Sz);
  214. #else
  215. #error "Plesae define bus usage"
  216. #endif
  217. }
  218. /**
  219. * @fn nm_write_block
  220. * @brief Write block of data
  221. * @param [in] u32Addr
  222. * Start address
  223. * @param [in] puBuf
  224. * Pointer to the buffer holding the data to be written
  225. * @param [in] u32Sz
  226. * Number of bytes to write. The buffer size must be >= u32Sz
  227. * @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
  228. * @author M. Abdelmawla
  229. * @date 11 July 2012
  230. * @version 1.0
  231. */
  232. sint8 nm_write_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
  233. {
  234. uint16 u16MaxTrxSz = egstrNmBusCapabilities.u16MaxTrxSz - MAX_TRX_CFG_SZ;
  235. uint32 off = 0;
  236. sint8 s8Ret = M2M_SUCCESS;
  237. for(;;)
  238. {
  239. if(u32Sz <= u16MaxTrxSz)
  240. {
  241. s8Ret += p_nm_write_block(u32Addr, &puBuf[off], (uint16)u32Sz);
  242. break;
  243. }
  244. else
  245. {
  246. s8Ret += p_nm_write_block(u32Addr, &puBuf[off], u16MaxTrxSz);
  247. if(M2M_SUCCESS != s8Ret) break;
  248. u32Sz -= u16MaxTrxSz;
  249. off += u16MaxTrxSz;
  250. u32Addr += u16MaxTrxSz;
  251. }
  252. }
  253. return s8Ret;
  254. }
  255. #endif